DRSVR: Memory Transaction Scheduler for Memory Intensive Applications in GPGPU
FROM
September
2015
TO
December
2017
SoCal Research
University of California, Riverside, California, United States

Graphics Processing Units (GPUs) are massively parallel, throughput-oriented systems that offer high performance for a broad range of applications including memory-intensive applications. Different levels of caches are introduced in GPUs to reduce memory access traffic and memory latency. However, cache contention due to a large number of threads in GPUs can impact the effectiveness of caches in GPUs. Furthermore, divergent loads by saturating the MSHR entries can cause occlusion in the Load-Store units that can eventually lead to stalls in the pipeline and degrade the overall performance of the system. We propose the DRSVR Memory Transaction Scheduler that is consists of several queues, various sensors in the load-store unit and a cross-warp coalescing unit to improve GPU performance. By employing queues and based on the incoming data from sensors which report system status we can schedule transactions in a way that minimizes the occlusion, and overall cache contentions. Furthermore, the cross-warp coalescing unit can benefit the bandwidth by making it possible to send the load transaction responses to the register file during occlusion period; besides, the coalescing unit can the memory traffic.

Supervisor: Daniel Wong

   

C++  Computer Architecture  Simulation 

Studying Effects of Management Algorithms on Durability and Performance of Solid-State Disks
FROM
July
2014
TO
March
2015
Dependable Systems Laboratory (DSL)
Sharif University of Technology, Tehran, Iran

Utilization of solid-state drives in different applications has been increased dramatically in recent years as a result of their high-performance and low-power consumption; though, the main problem in solid-state drives is the maximum number of reads and writes. The importance of decreasing number of writes and its effect on the endurance of solid-state drives have been reviewed in numerous former researches. Interior management algorithms in solid-state drives can increase the number of reads and writes; thus, reducing the number of accesses to disk in the execution of management algorithms can improve a performance and durability of SSDs. In this project, I studied management algorithms in SSDs, especially garbage-collection and wear-leveling algorithms by using DISKSIM simulator and review their effects on durability and performance of SSDs.
I was working as a research assistant in Dependable System Laboratory under the supervision of Professor S. Ghassem Miremadi and his Ph.D. student, Saeideh Alinezhad. My project was a part of a Ph.D. thesis, “Reliability Improvement in Solid-State Drive Based Storage Systems with Endurance Enhancement.”

Supervisor: Seyed-Ghassem Miremadi

   

C++  Computer Architecture  Simulation